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Medium-Speed Clocking Module
FMC406
Sundance Multiprocessor Technology Ltd.
The FMC406 is a low-noise clock generation and distribution module with eight clock outputs and eight trigger outputs that are fully synchronized. This module can either distribute an externally supplied clock or a locally generated clock. In the standard configuration, the FMC406 can generate any clock frequency between 34.375 MHz and 250MHz and lock it to an internal or external reference. The maximum clock frequency can be extended to 350MHz as a build option.
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4-Channel 200 MHz A/D with DDC, Virtex-7 FPGA - 6U VPX
Model 57761
- Supports Xilinx Virtex-7 VXT FPGAs- GateXpress supports dynamic FPGA reconfiguration across PCIe- Four or eight 200 MHz 16-bit A/Ds- Four or eight multiband DDCs- Multiboard programmable beamformer- 4 or 8 GB of DDR3 SDRAM- PCI Express (Gen. 1, 2 & 3) interface up to x8- Sample clock synchronization to an external system reference- LVPECL clock/sync bus formultimodule synchronization- Optional LVDS connections to the Virtex-7 FPGA for custom I/O- Ruggedized and conduction-cooled versions available- Supports GateXpress® FPGA-PCIe Configuration Manager- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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Four Channel Clock Driver Card
PI-41401
The PI-41401 is a four channel Clock Driver card capable of operating up to 140 MHz at 3V and 100 MHz at 5V amplitudes into a 50 Ohm load. The PI-41401 has a clock rate of 90 MHz at an amplitude of 5 volts into a 1-MOhm load. Into a high impedance load the output voltage range is from –5 volts to +8 volts with the pulse amplitude ranging from 0V to 9V. When driving a 50 load the voltage range is –2.5 volts to 4.0 volts with the pulse amplitude ranging from effectively 0V to 4.5V. Each channel has a common edgespeed control to vary the rising and falling edges of the output waveform. The adjustable slew rate range, for any amplitude, is the minimum edgespeed of that amplitude times 5. The output pulse amplitude and the load being driven determine the range of variability.
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Controllable, Programmable Clocked AC Source
EAC-AFV
*Output from 15kVA to 2000kVA*Output voltages 0VAC to 700VAC / 1000VDC per phase*Maximum currents up to 2000A per phase*Simulation of 1- and 3-phase networks (worldwide)*Variable frequency of up to 2000Hz, sine, square, triangle*Indication via graphic display
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Mini PCI Express Timecode and GPS Reader Generator
SyncClock
The Mini PCIe SyncClock32 from Brandywine Communications provides precision time with zero latency to the host computer using one Mini-PCIe slot. An on-board microprocessor automatically synchronizes the clock to reference signal inputs. The reference signal inputs can be 1 PPS, IRIG or NASA time codes and optionally, HaveQuick.
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Thermometer
Shenzhen UYIGAO Electronic Technology Co., Ltd
Temperature and humidity, time, alarm clock display
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Thermometer Clock
3331
Peaceful Thriving Enterprise Co Ltd
*Clock Display.*Easily Installed.*℃/℉ Selectable*Indoor/Outdoor Temperature Display and Backlight.*Easily fitted to car dash or wall by included 3M scotch magic tape.
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FPGA PXI High-Performance Digital I/O Card
GX3700
The GX3700 is a user configurable, FPGA-based, 3U PXI card which offers 160 digital I/O signals which can be configured for single-ended or differential interfaces. The card employs the Altera Stratix III FPGA, which can support SerDes data rates up to 1.2 Gb/s, digital I/O clock rates of 700 MHz, and features 47,500 logic elements and 2.1 kb of memory. The GX3700 is supplied with an integral expansion board providing access to the FPGA’s 160 I/Os. Alternatively, users can design their own custom expansion cards for specific applications - eliminating the need for additional external boards which are cumbersome and physically difficult to integrate into a test system. The design of the FPGA is done by using Altera’s free Quartus II Web Edition tool set. Once the user has compiled the FPGA design, the configuration file can be loaded into the FPGA directly or via an on-board EEPROM.
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PLD For Bridging, Infinitely Reconfigurable I/O Expansion.
MachXO
*Up to 27.6 Kbits sysMEM™ embedded block RAM and up to 7.7Kbits distributed RAM*SRAM based logic can be reconfigured in milliseconds using JTAG port*IOs support LVCMOS, LVTTL, PCI, LVDS, Bus-LVDS, LVPECL, RSDS*Up to two analog PLLs per device that enable clock multiplication, division, and phase shifting*Available in TQFP, csBGA, caBGA and ftBGA packages
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Submersible, Thermocouple Based Temperature Data Logger
TCTemp1000
The TCTemp1000 is a rugged, submersible, battery powered, thermocouple based temperature data logger. This is a stand-alone, compact, portable, easy to use device that can measure and record data for up to 16,383 measurements per channel. The storage medium is non-volatile solid state memory, providing maximum data security even if the battery becomes discharged. Its real time clock ensures all data is time and date stamped.
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CPCI timing plug-in
CPCI-SyncClock32
The CPCI-SyncClock32 from Brandywine Communications provides precision time with zero latency to the host computer over the CPCI bus in the 3u form factor. An on-board microprocessor automatically synchronizes the clock to reference signal inputs. The reference signal inputs can be 1 PPS, IRIG or NASA time codes and optionally, GPS or Have Quick.
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Digital Stopwatch
Designed to time single events or processes which produce start and stop pulses. Resolution to 0.2 s, duration from 1 s to 999,999 hours. Time may be displayed in HH.MM.SS clock format with 1 s resolution or in decimal H, M or S format with six-digit resolution. Multiple events can also be accumulated.
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IP-BiSerial-IO
The serial Input and Output channels are highly programmable and fully independent. The standard interface offers Data, Clock and Strobe. The programmable output rates and a user oscillator position allow for flexible frequency selection. The adaptable interface allows for bursted or continuous operation, and all kinds of data / handshake protocols.
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2-Ch 500 MHz A/D w/ DDC & 2-Ch 800 MHz D/A w/ DUC, Virtex-6 FPGA - 3U VPX
Model 52651
- Complete radar and software radio interface solution- Supports Xilinx Virtex-6 LXT and SXT FPGAs- Two 500 MHz 12-bit A/Ds- Two multiband DDCs (digital downconverters)- Two 800 MHz 16-bit D/As- One DUC (digital upconverter)- Multiboard programmable beamformer- Up to 2 GB of DDR3 SDRAM or 16 MB of QDRII+ SRAM- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multimodule synchronization- Optional LVDS connections to the Virtex-6 FPGA for custom I/O- 3U VPX form factor provides a compact, rugged platform- Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX™ System Specification)- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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64 Channel 12bit 62.5 MS/s Digitizer
VX1740
The VX1740 is a 1-unit wide VME64X 6U module housing a 64 Channel 12 bit 62.5 MS/s (65 MS/s using external clock) Flash ADC Waveform Digitizer and featuring 2 Vpp single ended input dynamics on two ERNI SMC connectors. Versions with 10 Vpp (single ended) input full scale range are also available (VX1740A/VX1740C).
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Digital Thermometer
ST-2
In / out temperature measurement. Clock function display. Super-thin design. Measurement range: -50℃∽+70℃Distinguish: >-20℃ is 0.1℃ ≤-20℃ is 1.0℃Accuracy:±1℃ Power: DC1.5V, battery LR44Product size: 56.5×37.8×11.3mm Screen size: 46.7×21.2mm
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12 Channels 1.0 ~ 17.0 Gb/s (200Gbps) Pulse Pattern Generator and Error Detector
CA9806-12
The UC INSTRUEMNTS CA9806-12 is a highp erformance, flexible 12 channels Pulse Pattern Generator and Error Detector that can operate from 1.0 to 17.0 Gb/s (200 G). It is combined with three sets CA9806 4 CH 1.0 to 17.0 Gbps Pulse Pattern Generator and Error Detector that incorporates an external one by 4 rate clock synthesizer. Its small size allows it to be placed close to the device under test, it can also be placed further away using the TX driver pre and post emphasis controls features to compensate for cable and interconnect losses. It also has a non destructive, integrated eye outline capture feature along with a quick eye height and width measurement capability. Build-in 8.5 ~ 15 Gb/s eye diagram testing function.
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One-box testing for PTP
Paragon-X
One-box testing for PTP Master, Slave, T-BC and T-TC clock devicesIndustry leading Time Error solutionCapture and replay PDV stress profilesAutomatic configuration and validation of PTP fields
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2-Channel 400MHz DDS Signal Generator
2940A
The 2940A is a two-channel 400MHz DDS Signal Generator that generates two independent sine wave output frequencies simultaneously from 200kHz to 400MHz in 1Hz steps. A Clock Generator configuration with ECL or LVDS clock outputs is also available. The 2940A is lockable to an external frequency standard or is used with its internal TCXO. Optional internal amplifiers and 60dB step attentators available. Set all parameters with front panel controls and LCD display or by computer using the RS232 serial interface. All settings can be saved into non-volatile EEPROM memory upon power down. Windows software included.
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3U CompactPCI 2-slot SSL 33MHz VIO 5V BW 64-Bit
80932-002-6600
3U CompactPCI backplane 2-slot, PICMG 2.0 R3.0, system slot left, supports full hot swap function according to PICMG 2.1 R2.0 hot-swap specification, clock frequency 33MHz, V(I/O) +5V, bus width 64-bit, power input connection with Fastons connectors
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LVDS Digital I/O with Virtex-6 FPGA - XMC
Model 71610
- 32 bits of LVDS digital I/O- One LVDS clock- One LVDS data valid- One LVDS data suspend- Supports LXT and SXT Virtex-6 FPGAs- DMA controller moves data to and from system memory- Up to 2 GB of DDR3 SDRAM- PCI Express Interface- Optional user-configurable gigabit serial interface- Optional LVDS connections to the Virtex-6 FPGA for custom I/O to the carrier board- RoHS Compliant Lead-Free Version Available
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2-Channel 200 MHz A/D with 766 DDCs, Kintex UltraScale FPGA - 3U VPX
Model 52865
- Jade Xilinx Kintex UltraScale FPGA Products and Navigator Design Suite Software Video- Jade Xilinx Kintex UltraScale FPGA Family Brochure- Complete software radio receiver solution for extremely high-channel-count applications- Uses Xilinx Kintex UltraScale KU035 FPGAs- Two 200 MHz 16-bit A/Ds- Four wideband DDCs (digital downconverters)- Up to 762 narrowband DDCs- Sample clock generation and synchronization to an external system reference- PCI Express (Gen. 1, 2 & 3) interface up to x4- Compatible with several VITA standards including: VITA-46, VITA-48 and VITA-65 (OpenVPX™ System Specification)- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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PXIe Precision AWG: 4 Channels, 400 MHz
M5301A
The M5301A is a single-slot PXIe module with four baseband AWG outputs, clock input and output, and four triggers. It provides high performance with easy-to-use programming libraries, real-time sequencing technology, and FPGA programming.
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Near Field Probes 1GHz - 10 GHz
SX set
The SX1 set consists of 3 passive near field probes for making measurements in the development phase of E-field and magnetic field with a high clock frequency in the range from 1 GHz to 10 GHz. The probe heads of the set SX allow for measurements close to electronic assemblies, e.g. on single IC pins, conducting paths, components and their connectors, to localize interference sources. Field orientation and field distribution on an electronic assembly can be detected through trained use of the near field probe. The near field probes are small and handy. They have a sheath current attenuation and are electrically shielded. They can be connected to a spectrum analyzer or an oscilloscope with a 50 Ω input. They have an internal terminating resistance.
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2-Channel DAQ Module
FMC142
Sundance Multiprocessor Technology Ltd.
The FMC142 is an analog-to-digital (A/D) and digital-to-analog (D/A) FMC daughter card that provides two 16-bit A/D channels at 370MSPS and two 16-bit D/A channels at 2.5GSPS which can be clocked by an internal clock source (optionally locked to an external reference) or by an externally-supplied sample clock. A trigger input is also available for customized sampling control. The FMC142 is mechanically and electrically compliant to the FMC standard (ANSI/VITA 57.1-2010). It offers front panel analog I/O access and can be used in a conduction-cooled environment.
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50/85 GHz Precision Waveform Analyzer
N1060A
Gain margin with high instrument performance: high BW (50 GHz or 35 GHz) receivers, ultra-low residual jitter (< 50 fs typical); adjustable clock recovery peaking & loop BW Reduce development time through instrument flexibility with integrated clock recovery (data rates 50 Mb/s to 32 Gb/s) & integrated pickoffs & phase matched cables for simple one connection "triggerless" operation Reduce validation time with analysis tools like Jitter Spectrum Analysis & SW Clock Recovery Emulation
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Universal Programmers
Xeltek engineers work around the clock to maintain the largest device library in the industry, so new devices are being added on a daily basis for EPROM, Paged EPROM, Parallel and Serial EEPROM, FPGA Configuration PROM, FLASH memory (NOR), BPROM, NVRAM, SPLD, CPLD, EPLD, Firmware HUB, Microcontroller, and MCUs. The majority of SuperPro universal programmers come equipped with a ZIF socket supporting up to 144 pins for programming a wide range of DIP devices; other chip package supported includes SDIP, PLCC, JLCC, SOIC, QFP, TQFP, PQFP, VQFP, TSOP, SOP, TSOPII, PSOP, TSSOP, SON, EBGA, FBGA, VFBGA, uBGA, CSP, and SCSP.
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Phase Locked Loop with Integrated VCO
PLL with integrated VCOs provide local oscillator sources and clock sources for communications (COMMS) , test and measurement (ETM) and aerospace/defense (ADEF) applications. ADI's PLLs with integrated VCO portfolio includes both narrowband and wideband parts, supporting frequencies up to 13.6GHz. Our PLLs with integrated VCO, as well as our full PLL portfolio including integer-N and fractional-N PLLs, feature best-in-class performance for phase noise, jitter, and spurious, and also feature high levels of integration in small form factor packages.
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3-Ch 200 MHz A/D with DDC & 2-Ch 800 MHz D/A with DUC, Virtex-6 FPGA - 6U VPX
Model 57621
- Complete radar and software radio interface solution- Supports Xilinx Virtex-6 LXT and SXT FPGAs- Three 200 MHz 16-bit A/Ds- Three multiband DDCs (digital downconverters)- One DUCs (digital upconverters)- Two 800 MHz 16-bit D/As- One multiboard programmable beamformers- 2 GB of DDR3 SDRAM; 32 MB of QDRII+ SRAM- PCI Express (Gen. 1 & 2) interface up to x8- Sample clock synchronization to an external system reference- LVPECL clock/sync bus for multiboard synchronization- Optional LVDS connections to the Virtex-6 FPGA for custom I/O- Ruggedized and conduction-cooled versions available- Synchronize up to eight modules with Model 7893 System Synchronization and Distribution Amplifier - PCIe
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D-Type Flip-Flops
Advanced Science and Novel Technology, Co., Inc.
High speed broadband D-Type Flip-Flop for data retiming with full rate clockExhibits low jitter and limited temperature variation over industrial temperature range6.5ps set-up/hold time capability87% clock phase margin for retiming of data input eyeFully differential CML input interfacesFully differential CML output interface with 400mV single-ended swingSingle +3.3V or -3.3V power supplyPower consumption: 415mWFabricated in SiGe for high performance, yield, and reliabilityCustom CQFP 24-pin package
