Embedded Vision And Processing FPGA

Embedded Vision And Processing FPGA

*Instant-on configuration – IO configures in 3 ms, and device as fast as 8 ms
*Two hardened 4-lane MIPI D-PHY transceivers at 10 Gbps per PHY / 2.5 Gbps per lane
*Up to 37 programmable source synchronous I/O pairs for camera and display interfacing

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