Enhance Transactional Universal Verification Methodology (UVM) testbenches

Enhance Transactional Universal Verification Methodology (UVM) testbenches

TrekUVM automatically generates self-verifying test cases that run in existing transactional testbenches, including those compliant with the Universal Verification Methodology (UVM) standard. This verifies your chips more quickly and more thoroughly than using UVM alone to generate transactions. TrekUVM's generated test cases target all aspects of full-chip verification and work in a variety of different environments.

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