Low-Power General Purpose FPGA

Low-Power General Purpose FPGA

*Up to 39K logic cells, 2.9 Mb embedded memory, 56 18 x 18 multipliers, 192 programmable I/O, one lane of 5 Gbps PCIe, two lanes of 1.25 Gbps SGMII, two ADCs (each 12-bit, 1 MSPS).
*Packages as small as 6x6 mm, and in ball-pitch options of 0.5 and 0.8 mm.
*Power modes – User selectable Low Power vs. High Performance modes, enabled by FD-SOI programmable back-bias.
*Design security – ECDSA bitstream authentication, coupled with robust AES-256 encryption.
*Instant-on configuration – I/O configures in 3 ms, and full-device as fast as 8 ms.
*Available in Commercial, Industrial and Automotive (AEC-Q100 qualified) temperature grades.

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