Showing results: 61 - 64 of 64 items found.
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Raytheon Company
The Component Test and Analysis team specializes in electronic and mechanical components such as hybrids, connectors, cables, harnesses, passive or discrete components, and digital or linear devices. The test lab has extensive experience in developing test software to electrically and environmentally characterize virtually any integrated circuit, including analog, digital, mixed signal, converters, FPGA and ASICs, as well as experience in developing actual radiation environments for parts testing. The component analysis team offers the analytical expertise and advanced instrumentation to identify root cause explanation for a wide range of component-level failures, as well as the resources to evaluate for possible quality and reliability issues through non-destructive and destructive techniques. With access to a detailed database, the Component Test and Analysis team offers a 25-year history of test and analysis data — a valuable resource for addressing new customer requirements.
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C&C Instruments Co.
Waveform : Sine, Triangle, Square, Pulse, Sawtooth, Ramp 0.2Hz-150MHz EXT Frequency Counter(Option : 1:6 GHz or 2.7GHz) Self made insert ASIC Function : Total, RPM, Period, LPF, COUPL(AC/DC), ATT(X10) Fast,High-Resolution, 8Digits LED display Internal or External AM,FM Modulation Internal or External Burst and Linear Sweep Countrol from 1 : 1 to 100:1 TTL/CMOS Leveled Square Wave Output Maximum Attenuation of 20 dB cna be obtained Output impedance : 50 INPUT SENSITMTYKHz Range : 100mVms, MHz Range : 300mVms SWEEP WIDTH : Variable from 1:1 -100:1 RATE : 0.5Hz - 50Hz(20ms-2s) INTERNAL : Linear Bilt-in 5digits Green LED display
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Gidel
Gidel’s Vision Pro Development Kit is an optimal solution for developing,validating, demonstrating and evaluating Image Processing (IP) andpipeline designs on FPGA.The suite is designed to provide a complete and convenient envelop enablingthe developer to focus strictly on the proprietary image processingdesign. The entire Vision Pro flow is within a single FPGA, independentof the final target application(s). The Vision Pro flow is composedof a pipeline that streams simulated data to the user image processingdesign under test (DUT) and then captures the design’s output streamfor displaying, storing, analysis and/or co-processing on host software.The entire process is performed on a single FPGA without the need foradditional peripheral connectivity or tools.Vision Pro suite is plug-and-play enabling the developer to begin at oncethe IP design development and validation. A simple design example providesthe developer immediate hands-on familiarization with the systemflow and supporting tools. The final design can be ported to any IntelFPGA device or other vendors’ devices (FPGA or ASIC) by replacing basiclibraries. To significantly reduce compilation time, initial design developmentmay be on a small FPGA device and later compiled for the targetdevice(s). The target implementation may use any FPGA board. For a fullImaging/Vision system solution, Gidel offers a number of off-the-shelfgrabbers and FPGA accelerators that are designed to utilize these imageprocessing blocks and Gidel Imaging Library (GIL).
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Granite River Labs Inc.
PCI Express® 4.0 Receiver Test Automation Software Suite (GRL-PCIE4-RXA) provides an automated, simple and efficient way to test your 4.0 designs using the Anritsu MP1900A with any Tektronix and Keysight Real-Time Oscilloscope oscilloscope. The GRL-PCIE4-RXA Test Suite features two components that can be ordered separately or bundled together. GRL-PCIE4-BASE-RXA is used for testing your PCIe® 4.0 Receiver to the Base (ASIC) Specification, while GRL-PCIE4-CEM-RXA is used for testing end products to the PCIe® 4.0 CEM (Card Electro-Mechanical) Specification. GRL-PCIE4-RXA provides a simple user interface to automate complex PCIe testing. The software runs on Windows 7 or higher oscilloscope or any PC OS, and significantly reduces equipment calibration and test time. For Base Specification testing, GRL software uses the industry-standard Seasim statistical data eye simulator to establish the calibrated test channel DDJ. The final calibrated eye diagram uses both Seasim and SigTest software to arrive at the final stressed eye diagram. Receiver jitter tolerance and margin testing can then be performed on the device under test. For CEM Spec testing, GRL software uses VNA method for Channel measurement and SigTest for all other stressed eye impairments. Jitter Tolerance and Margin Testing is offered in both BASE and CEM software versions of the software, while The CEM version provides all the tests required by the PCIe® 4.0 CEM CTS. Transmitter testing is also available using GRL-PCIE34-TXP1 Software and Controller. If ordered with with GRL-PCIE4-RXA Receiver test software, all PCIe® 4.0 CTS CEM tests (Transmitter and Receiver) can be performed on the MP1900 and any vendor’s Real-Time Oscilloscope using GRL’s automation framework without the need for vendor specific software tools.
