FPGA Mezzanine Card

FPGA Mezzanine Card

The FMC160 provides one 12-bit A/D channel at 3.6Gsps and one 14-bit D/A channel at 5.7Gsps (2.85Gsps direct RF synthesis) clocked by either an internal clock source (optionally locked to an external reference) or an externally supplied sample clock. In addition, a trigger input for customized sampling control is available to users. It is mechanically and electrically compliant with the FMC standard (ANSI/VITA 57.1).

Subcomponents

  • SSMB Jack coax (Female): Quantity: 1

  • SSMB Jack coax (Female): Quantity: 1

  • SSMB Jack coax (Female): Quantity: 1

  • SSMB Jack coax (Female): Quantity: 1

  • SSMB Jack coax (Female): Quantity: 1

  • SSMB Jack coax (Female): Quantity: 1

Get Help