PathWave RFIC Design (GoldenGate)
Early in the RFIC design phase, monitoring system IC specifications such as EVM via RF simulation is a must. Simulations include effects of layout parasitics, complex modulated signals, and digital control circuitry. With PathWave RFIC Design, you can simulate in both the frequency and time domain and bring your designs to and from Cadence Virtuoso and Synopsys Custom Compiler.
