Open Source Logic Analyzer

Open Source Logic Analyzer

8 channels 256,000 Samples recording size 20 MHz sampling speed, can potentially be overclocked to 60 MHz No compromise on sample size when combining different speeds or number of channels Simple configurable edge detection triggers on all inputs (simple OR trigger) Configurable ratio of samples from before and after the trigger (rolling sample buffer) 5 V tolerant inputs (LOW-level voltage < 0.8 V, HIGH-level voltage > 2.0 V) About 500 kB/s transfer speed to the PC (256 kSamples take about 0.5 seconds) Data capturing can be stopped from the host software anytime Cross platform host software for Windows, OS X, and Linux DIY-friendly 0603 parts and SOIC packages used on a 2-layer board On board 3.3 V regulator can supply up to 400 mA to an external circuit Tiny 3cm x 3cm PCB Firmware updates via built-in USB bootloader Probe cables and acrylic case available from Seeed Studio Open source PCB (EAGLE) and firmware files

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