Showing results: 46 - 50 of 50 items found.
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T5830/T5830ES -
Advantest Corp.
Highly flexible tester which has all of the capabilities needed to perform wafer sorting and final testing of price-sensitive flash memories
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T5503HS2 -
Advantest Corp.
Semiconductor memories are in high demand to meet the needs of fast-growing end markets such as portable electronics and servers. It has been forecasted that applications ranging from mobile devices and data centers to automobiles, gaming systems and graphics cards will consume an estimated 120 billion gigabits of DRAM capacity. To meet this market demand, new generations of memories with data-transfer speeds of 6.4 Gbps and higher are being developed. Advantest’s second-generation T5503HS2 tester is designed to handle these ultra-high-speed memory ICs.
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T5835 -
Advantest Corp.
The new T5835 has full testing functionality, from package testing to high-speed wafer testing, for any memory ICs with operating speeds up to 5.4 Gbps, including all next-generation memories from NAND flash devices to DDR-DRAM and LPDDR-DRAM. It can handle 768 devices simultaneously for final package-level testing. It additionally features functions such as an enhanced programmable power supply (PPS) for advanced mobile memories, and a real-time DQS vs. DQ function to improve yield.
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T5830 -
Advantest Corp.
T5830 memory tester, the latest member of its T5800 product family, optimized for testing a wide range of flash memory devices used in mobile electronic devices. The highly flexible T5830 tester has all of the capabilities needed to perform wafer sorting and final testing of price-sensitive flash memories.
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T5230 -
Advantest Corp.
T5230 memory test system for NAND/NVM devices adopts a combined array architecture to achieve best-in-class cost-of-test performance for wafer test, including wafer-level burn-in (WLBI) and built-in self-test (BIST). The system can perform on-wafer test of 1,024 memory devices per test head in parallel, delivering high productivity and enabling floor space savings of up to 86%. Multiple test cells are connected per system controller in the T5230, allowing independent wafer test of each test cell. The test cells can be stored in a general multi-wafer prober while minimizing the test cell floor space, and the tester can be docked with probers in both linear and multi-stack configurations. For functional tests at a maximum test rate of 125MHz/250Mbps, the T5230 assures high timing accuracy, repeatability, and failure detection capability.