Adaptative Body Bias (ABB) IP

A revolutionary FD-SOI bias generator enabling real-time corner compensation:
- Up to 10x energy efficiency gains at low VDD
- Foundation IP independent
- Seamless integration

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Family

Semiconductor IP

DOLPHIN Design

Our Foundation, Power Management and Audio Sensing IP are cleverly designed to optimize energy consumption in sleep and active modes. State transitions are carefully controlled to achieve the best efficiency.

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Power Management IP

DOLPHIN Design

We provide a comprehensive set of silicon-proven, compatible IP clusters with the most advanced low-power design techniques.

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Audio IP

DOLPHIN Design

We provide high-performance, compact, low power and customizable audio analog mixed-signal IP in leading foundry processes, including a wide range of ADC, DAC, CODEC and Voice Activity Detectors.

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Foundation IP

TSMC - DOLPHIN Design

Our Foundation IPs embed power management features (multi-Vt/multi-channel libraries, multi-VDD characterization, integrated power-switches, source-biasing…) which allow designers to explore the SoC architecture. Optimal configurations can be generated to meet the application’s Performance, Power and Area constraints. We also complement our offering to reach best-in-class Energy Efficient SoC by serving Always-On power-domains with a dedicated offer, optimized to achieve the ultra-low-power requirements of battery-operated devices in sleep mode.

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Adaptative Body Bias (ABB) IP

Topics

Semiconductor IP

Power Management IP

Audio IP

Foundation IP