System-Level QEMU Co-Simulation
Level up and perform full System HW-SW verification at pre-silicon level
Iterate HW and SW changes 10X faster at RTL compared to FPGA or system prototypes
Begin HW-SW integration much sooner in development process
Virtual machine to VIP co-sim/co-emulate environment extends existing SV/UVM testbench + VIPs
X86 Host
Supports PCIe/CXL root complex VIP
Run Linux kernel drivers, compliance and benchmarking programs, and application software
Arm, RISC-V embedded systems
Supports AMBA (AXI/AHB/APB) VIP
Run bare metal code or RTOS embedded systems
Run OS and SW unmodified from actual system configuration
Debug trace shows QEMU to remote PCIe/CXL/AXI ports transactions
Avery's implementation of QEMU co-simulation is optimized for fastest performance including KVM mode and iWARP technology
Simulations are scalable to 10s to 100s of instances for regression over OS versions and HW configurations
