Shared Memory PCI, PMC, and VME Boards

SCRAMNet+ SC150 - Curtiss-Wright Defense Solutions

To enhance performance, The SCRAMNet+ SC150e products use an architecture where shared memory read operations bypass the SCRAMNet ASIC. DMA operations will have the greatest increase in performance in addition to better PIO and DMA operations. The overall performance becomes more effective as read latency is reduced, the number of PCI retries is decreased, and the PCI bus utilization is improved.