Digital Down Conversion

Digital Down Conversion

Digital Down Conversion (DDC) FPGA IP cores are available supporting Xilinx Virtex-5, Virtex-6 and Virtex/Kintex-7 FPGAs. The DDC family of IP cores support decimation from 2 to 64 in complex mode and from 2 to 32 in real mode. The DDC is available as embedded IP within a number of Curtiss-Wright ADC products or in a source format.

Get Help