PVTMC Verifier

Variation Designer 4 - Solido Design Automation Inc.

The world’s best technology for variation-aware design of memory, analog/RF, and standard cells. Sets the standard for semiconductor variation-aware design. Full design coverage in orders-of-magnitude fewer simulations with accuracy of brute force techniques. Improves design performance, power, area, and yield. Perfect tool for solving real production design challenges in memory, analog/RF, and standard cell design.