Strong Design-to-Test Linkage
To further streamline the transition from design simulation to actual testing, Verigy offers SmarTest Program Generator (SmarTest PG). This interactive, graphically oriented pattern, timing, and format generation tool helps test engineers create, optimize and debug test programs all in one common environment. SmarTest PG takes design simulation or DFT/ATPG data from the EDA domain and generates test pattern and program files for concurrent test on Verigy's testers.
|
Verigy Ltd.
5301 Stevens Creek Blvd.
|
