PCI66-USD32SLX - Universal Serial I/O with Large FPGAs

Cyclone II FPGA (EP2C35F672) LVDS or RS-485 or serial multiprotocol transceivers) Two universal serial controllers (Z16C32) with built in DMA) 512MByte SRAM (for data FIFOs)) 8 external PLLs to allow for at least 8 independent channels). Connections to allow for a daughterboard for changing transceivers, adding logic, etc) 68pin SCSI-3 connector (same as on current SOI4).)