LAP-322000U-A - Logic Analyzer
Sample rate (Internal clock): 200MHz asynchronous operation
Sample rate (External clock): 100MHz synchronous operation
Memory Depth (per channel): 2Mbits
Channels: 32CH
Upgrade Oscilloscope to measure and decode I2C / UART
(RS232C & RS485) / SPI Protocols and mixed signals
Glitch Capture Capability: 5ns
Bandwidth: 75MHz
Data decoding formats: Binary / Decimal / Hexadecimal / ASCII
Export data: Export to TXT or CSV files for processing
Compression rate: up to 255:1 depending on activity
Power: USB-powered- ideal for PC and laptops
Trigger conditions: Flexible signal trigger options (rising edge, falling edge, either edge, high and low).
Selectable trigger position: Between 100% pre-trigger and 100% post trigger plus up to 16.7 million clocks of post-trigger delay.
Channels may be selectively defulted to
Easy-to-use Windows application
Timing/State/Single-processor / Bus/Real-time instruction trace analysis
Software updates available from ZEROPLUS website
Certificates: CE , FCC , WEEE , RoHS
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Zeroplus Technology Corperation
3F, No.121, Jian Ba RD.Chung Ho city
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